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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input Data Selector/Multiplexer
High-Performance Silicon-Gate CMOS
The MC74HC158A is identical in pinout to the LS158. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These devices route 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in inverted form for the HC158A. A high level on the Output Enable input sets all four Y outputs to a high level for the HC158A.
MC74HC158A
16 1
N SUFFIX PLASTIC PACKAGE CASE 648-08
* * * * * * *
16
Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6V Low Input Current: 1A High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 74 FETs or 18.5 Equivalent Gates LOGIC DIAGRAM
A0 Nibble A Inputs A1 A2 A3 B0 Nibble B Inputs B1 B2 B3 2 5 11 14 4 3 6 10 13 7 9 12 Y0 Y1 Y2 Y3 Data Outputs
16
1
D SUFFIX SOIC PACKAGE CASE 751B-05 DT SUFFIX TSSOP PACKAGE CASE 948F-01
1
ORDERING INFORMATION MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT Plastic SOIC TSSOP
FUNCTION TABLE
Inputs Output Enable H L L Select X L H Outputs Y0-Y3 H A0-A3 B0-B3
Select Output Enable
1 15
Pin 16 = VCC Pin 8 = GND
Pinout: 16-Lead Plastic Package (Top View)
Output VCC Enable 16 15 A3 14 B3 13 Y3 12 A2 11 B2 10 Y2 9
X = Don't Care A0-A3, B0-B3 = the levels of the respective Data-Word inputs.
1 Select
2 A0
3 B0
4 Y0
5 A1
6 B1
7 Y1
8 GND
2/97
(c) Motorola, Inc. 1997
3-1
REV 1
MC74HC158A
III I I I I II II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I I II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIIIIIIIIIIIIIIIIIIIII I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I III I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I III I I I I II I I I I I I II I I II I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIIIIIIIIIIIIIIIIIIIII III I III I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I III I I III I IIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III III I I II I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIII III II I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII I I
IIIIIIII I I II I IIIIIIIIIIIIIIII II I I I IIIIIIIIIIIIIIIIIIIIII I I III I I I I I II IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I III I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII IIIIII I I IIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIII
MAXIMUM RATINGS*
Symbol VCC Vin Parameter Value Unit V V V DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) - 0.5 to + 7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 20 25 50 750 500 450 Vout Iin DC Output Voltage (Referenced to GND) DC Input Current, per Pin mA mA mA Iout DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP SOIC Package TSSOP Package mW Tstg TL Storage Temperature - 65 to + 150 260
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
v
v
_C _C
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP, SOIC or TSSOP Package)
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. Derating -- Plastic DIP: - 10 mW/_C from 65_ to 125_C SOIC Package: - 7 mW/_C from 65_ to 125_C TSSOP Package: - 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Parameter Min 2.0 0 Max 6.0 Unit V V DC Supply Voltage (Referenced to GND)
Vin, Vout TA
DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 2)
VCC
- 55 0 0 0 0
+ 125 1000 600 500 400
_C
ns
tr, tf
VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol VIH
Parameter
Test Conditions
VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 4.5 6.0 3.0 4.5 6.0
-55_C to 25_C 1.5 2.1 3.15 4.2 0.5 0.9 1.35 1.8 1.9 4.4 5.9
v 85_C v 125_C
1.5 2.1 3.15 4.2 0.5 0.9 1.35 1.8 1.9 4.4 5.9 1.5 2.1 3.15 4.2 0.5 0.9 1.35 1.8 1.9 4.4 5.9
Unit V
Minimum High-Level Input Voltage
Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A
v v v
VIL
Maximum Low-Level Input Voltage
Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A
V
VOH
Minimum High-Level Output Voltage
Vin = VIH or VIL |Iout| 20 A
V
Vin = VIH or VIL |Iout| |Iout| |Iout|
v 2.4 mA v 4.0 mA v 5.2 mA
2.48 3.98 5.48
2.34 3.84 5.34
2.20 3.70 5.20
MOTOROLA
3-2
High-Speed CMOS Logic Data DL129 -- Rev 6
MC74HC158A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
II I II I I I I IIIIIIIII IIIIIIIIIIIIIIIIIIIIIII I I II I I I II I II III I III I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I I I I I I II I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I I I I I I II I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIII IIIIIIIIIIII II I I I I IIIIIIIIIIII I I I III I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I III I I I IIIIIIIII IIIIIIIIIIII I I II I I I II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I I I I I I II I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I III I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII I I I
Guaranteed Limit Symbol VOL Parameter Test Conditions VCC V 2.0 4.5 6.0 3.0 4.5 6.0 6.0 6.0 -55_C to 25_C 0.1 0.1 0.1
v 85_C v 125_C
0.1 0.1 0.1 0.1 0.1 0.1 0.33 0.33 0.33 0.40 0.40 0.40
Unit V
Maximum Low-Level Output Voltage
Vin = VIH or VIL |Iout| 20 A
v
Vin = VIH or VIL |Iout| |Iout| |Iout| Vin = VCC or GND Vin = VCC or GND Iout = 0 A
v 2.4 mA v 4.0 mA v 5.2 mA
0.26 0.26 0.26
Iin
Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package)
0.1 4
1.0 40
1.0 160
A A
ICC
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
Guaranteed Limit
Symbol S bl tPLH, tPHL
Parameter P
VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 --
-55_C to 25_C 100 85 25 21 100 85 25 21 115 80 23 20 75 27 15 13 10
v 85_C v 125_C
140 95 31 26 140 95 31 26 145 90 29 25 95 32 19 16 10 160 110 38 32 160 110 38 32 175 100 35 30 110 36 22 19 10
Unit Ui ns
Maximum Propagation Delay, Input A or B to Output Y (Figures 1 and 4)
tPLH, tPHL
Maximum Propagation Delay, Select to Output Y (Figures 2 and 4)
ns
tPLH, tPHL
Maximum Propagation Delay, Output Enable to Output Y (Figures 3 and 4)
ns
tTLH, tTHL
Maximum Output Transition Time, Any Output (Figures 2 and 4)
ns
Cin
Maximum Input Capacitance
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High- Speed CMOS Data Book (DL129/D). Typical @ 25C, VCC = 5.0 V 35
CPD
Power Di i i C P Dissipation Capacitance (P Package)* i (Per P k )*
pF F
* Used to determine the no-load dynamic power consumption: P D = C PD V CC 2 f + I CC V CC . For load considerations, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
High-Speed CMOS Logic Data DL129 -- Rev 6
3-3
MOTOROLA
MC74HC158A
SWITCHING WAVEFORMS
tr 90% Input Aor B tPHL 90% Output Y tTHL 50% 10% 50% 10%
tf VCC
tr 90% Select GND tPLH tPHL 90% Output Y tTLH tTHL 50% 10% 50% 10%
tf VCC
GND tPLH
tTLH
Figure 1.
Figure 2. Y versus Select, Inverted
tr Output Enable 90% 50% 10% tPLH 90% Output Y tTLH 50% 10%
tf VCC OUTPUT DEVICE UNDER TEST
TEST POINT
GND tPHL
CL*
tTHL
*Includes all probe and jig capacitance
Figure 3.
Figure 4. Test Circuit
MOTOROLA
3-4
High-Speed CMOS Logic Data DL129 -- Rev 6
MC74HC158A
PIN DESCRIPTIONS
INPUTS A0-A3 (Pins 2,5,11,14) Nibble A inputs. The data present on these pins is transferred to the outputs when the Select input is at a low level and the Output Enable input is at a low level. The data is presented to the outputs in inverted form for the HC158A. B0-B3 (Pins 3,6,10,13) Nibble B inputs. The data present on these pins is transferred to the outputs when the Select input is at a high level and the Output Enable input is at a low level. The data is presented to the outputs in inverted form for the HC158A. OUTPUTS Y0-Y3 (Pins 4,7,9,12) Data outputs. The selected input nibble is presented at these outputs when the Output Enable input is at a low level. The data present on these pins is in its inverted form for the HC158A. For the Output Enable input at a high level, the outputs are at a high level for the HC158A.
CONTROL INPUTS Select (Pin 1) Nibble select. This input determines the data word to be transferred to the outputs. A low level on this input selects the A inputs and a high level selects the B inputs. Output Enable (Pin 15) Output Enable input. A low level on this input allows the selected data to be presented at the outputs. A high level on this input sets all of the outputs to a high level for the HC158A.
A0
2 4
B0
3
Y0
A1
5 7
B1 Nibble Inputs A2
6
Y1
11 9
Data Outputs
B2
10
Y2
A3
14 12
B3 Output Enable Select
13 15 1
Y3
Figure 5. Expanded Logic Diagram
High-Speed CMOS Logic Data DL129 -- Rev 6
3-5
MOTOROLA
MC74HC158A
OUTLINE DIMENSIONS
-A16 9
N SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE R B
1
8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.070 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0 10 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0 10 0.51 1.01
F S
C
L
-TH G D 16 PL 0.25 (0.010)
M
SEATING PLANE
K
J TA
M
M
-A-
D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
9
16
-B1 8
P 8 PL 0.25 (0.010)
M
B
M
G F
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7 0 6.20 5.80 0.50 0.25 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.229 0.244 0.010 0.019
K C -TSEATING PLANE
R X 45
M D 16 PL 0.25 (0.010)
M
J
T
B
S
A
S
MOTOROLA
3-6
High-Speed CMOS Logic Data DL129 -- Rev 6
MC74HC158A
OUTLINE DIMENSIONS
DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948F-01 ISSUE O
16X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
K K1
16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
2X
L/2
9
J1 B -U-
L
PIN 1 IDENT. 1 8
J
N 0.25 (0.010) 0.15 (0.006) T U
S
A -V- N F DETAIL E
C 0.10 (0.004) -T- SEATING
PLANE
H D G
DETAIL E
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High-Speed CMOS Logic Data DL129 -- Rev 6
3-7
CE E CCC ECC E
M
SECTION N-N
-W-
DIM A B C D F G H J J1 K K1 L M
MC74HC158A/D MOTOROLA


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